IRFP9140N preliminary hexfet ? power mosfet pd - 9.1492a fifth generation hexfets from international rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. the to-247 package is preferred for commercial- industrial applications where higher power levels preclude the use of to-220 devices. the to-247 is similar but superior to the earlier to-218 package because of its isolated mounting hole. v dss = -100v r ds(on) = 0.117 w i d = -23a l advanced process technology l dynamic dv/dt rating l 175c operating temperature l p-channel l fast switching l fully avalanche rated description to-247ac parameter max. units i d @ t c = 25c continuous drain current, v gs @ -10v -23 i d @ t c = 100c continuous drain current, v gs @ -10v -16 a i dm pulsed drain current ?? -76 p d @t c = 25c power dissipation 140 w linear derating factor 0.91 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy ?? 430 mj i ar avalanche current ? -11 a e ar repetitive avalanche energy ? 14 mj dv/dt peak diode recovery dv/dt ?? -5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c mounting torque, 6-32 or m3 screw 10 lbf?in (1.1n?m) absolute maximum ratings parameter typ. max. units r q jc junction-to-case CCC 1.1 r q cs case-to-sink, flat, greased surface 0.24 CCC c/w r q ja junction-to-ambient CCC 40 thermal resistance 3/16/98 s d g
IRFP9140N parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) CCC CCC showing the i sm pulsed source current integral reverse (body diode) ?? CCC CCC p-n junction diode. v sd diode forward voltage CCC CCC -1.3 v t j = 25c, i s = -13a, v gs = 0v ? t rr reverse recovery time CCC 150 220 ns t j = 25c, i f = -11a q rr reverse recoverycharge CCC 830 1200 c di/dt = -100a/s ? t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage -100 CCC CCC v v gs = 0v, i d = -250a d v (br)dss / d t j breakdown voltage temp. coefficient CCC -0.11 CCC v/c reference to 25c, i d = -1ma ? r ds(on) static drain-to-source on-resistance CCC CCC 0.117 w v gs = -10v, i d = -13a ? v gs(th) gate threshold voltage -2.0 CCC -4.0 v v ds = v gs , i d = -250a g fs forward transconductance 5.3 CCC CCC s v ds = -50v, i d = 11a ? CCC CCC -25 a v ds = -100v, v gs = 0v CCC CCC -250 v ds = -80v, v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 v gs = 20v gate-to-source reverse leakage CCC CCC -100 na v gs = -20v q g total gate charge CCC CCC 97 i d = -11a q gs gate-to-source charge CCC CCC 15 nc v ds = -80v q gd gate-to-drain ("miller") charge CCC CCC 51 v gs = -10v, see fig. 6 and 13 ?? t d(on) turn-on delay time CCC 15 CCC v dd = -50v t r rise time CCC 67 CCC i d = -11a t d(off) turn-off delay time CCC 51 CCC r g = 5.1 w t f fall time CCC 51 CCC r d = 4.2 w, see fig. 10 ?? between lead, CCC CCC 6mm (0.25in.) from package and center of die contact c iss input capacitance CCC 1300 CCC v gs = 0v c oss output capacitance CCC 400 CCC pf v ds = -25v c rss reverse transfer capacitance CCC 240 CCC ? = 1.0mhz, see fig. 5 ? nh electrical characteristics @ t j = 25c (unless otherwise specified) l d internal drain inductance l s internal source inductance CCC CCC i gss ns 5.0 i dss drain-to-source leakage current 13 ? starting t j = 25c, l = 7.1mh r g = 25 w , i as = -11a. (see figure 12) ? repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) notes: ? i sd -11a, di/dt -470a/s, v dd v (br)dss , t j 175c ? pulse width 300s; duty cycle 2%. ? uses irf9540n data and test conditions source-drain ratings and characteristics a -23 -76 s d g s d g
IRFP9140N fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics 1 10 100 0.1 1 10 100 d ds 20s pulse w idth t = 25c c a -i , d rain-to-source c urrent (a) -v , drain-to-source volta g e (v) vgs top - 15v - 10v - 8.0v - 7.0v - 6.0v - 5.5v - 5.0v bottom - 4.5v -4.5v 1 10 100 0.1 1 10 100 d ds a -i , drain-to-source current (a) -v , drain-to-source voltage (v) vgs top - 15v - 10v - 8.0v - 7.0v - 6.0v - 5.5v - 5.0v bottom - 4.5v -4.5v 20s pulse w idth t = 175c c 0.1 1 10 100 45678910 t = 25c j gs d a -i , d rain-to-source c urrent (a) -v , gate-to-source volta g e ( v ) v = -25v 20s pulse w idth ds t = 175c j 0.0 0.5 1.0 1.5 2.0 2.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 j t , junction temperature (c) r , drain-to-source o n resistance ds(on) (n orm alized) a v = -10v gs i = -19a d
IRFP9140N fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 500 1000 1500 2000 2500 3000 1 10 100 c, capacitance (pf) a ds -v , drain-to-source voltage (v) v = 0v, f = 1mhz c = c + c , c shorted c = c c = c + c gs iss gs gd ds rss gd oss ds gd c iss c oss c rss 0 4 8 12 16 20 0 20406080100 g gs a -v , g ate-to-source voltage (v) q , total g ate charge (nc) v = -80v v = -50v v = -20v ds ds ds for test circuit see figure 13 i = -11a d 1 10 100 1000 1 10 100 1000 operation in this area limited by r ds(on) 10ms a -i , drain current (a) -v , drain-to-source voltage (v) ds d 100s 1ms t = 25c t = 175c single pulse c j 0.1 1 10 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 t = 25c j v = 0v gs sd sd a -i , reverse drain current (a) -v , source-to-drain volta g e (v) t = 175c j
IRFP9140N fig 9. maximum drain current vs. case temperature fig 11. maximum effective transient thermal impedance, junction-to-case fig 10a. switching time test circuit fig 10b. switching time waveforms v ds -10v pulse width 1 s duty factor 0.1 % r d v gs v dd r g d.u.t. + - v ds 90% 10% v gs t d(on) t r t d(off) t f 25 50 75 100 125 150 175 0 5 10 15 20 25 t , case temperature ( c) i , drain current (a) c d 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)
IRFP9140N fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current q g q gs q gd v g charge -10v d.u.t. v ds i d i g -3ma v gs .3 m f 50k w .2 m f 12v current regulator same type as d.u.t. current sampling resistors + - fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v ( br ) dss i as r g i as 0.01 w t p d.u.t l v ds v dd driver a 15v -20v 0 200 400 600 800 1000 1200 25 50 75 100 125 150 175 j e , single pulse avalanche energy (mj) as a starting t , junction temperature (c) i top -4.7a -8.1a bottom -11a d
IRFP9140N peak diode recovery dv/dt test circuit p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - ? ? ? r g v dd dv/dt controlled by r g i sd controlled by duty factor "d" d.u.t. - device under test d.u.t * circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? * reverse polarity of d.u.t for p-channel v gs [ ] [ ] *** v gs = 5.0v for logic level and 3v drive devices [ ] *** fig 14. for p-channel hexfets
IRFP9140N part marking information to-247ac package outline to-247ac outline dimensions are shown in millimeters (inches) lead assignments notes: - d - 5.30 (.209) 4.70 (.185) 2.50 (.089) 1.50 (.059) 4 3x 0.80 (.031) 0.40 (.016) 2.60 (.102) 2.20 (.087) 3.40 (.133) 3.00 (.118) 3x 0.25 (.010) m c a s 4.30 (.170) 3.70 (.145) - c - 2x 5.50 (.217) 4.50 (.177) 5.50 (.217) 0.25 (.010) 1.40 (.056) 1.00 (.039) 3.65 (.143) 3.55 (.140) d m m b - a - 15.90 (.626) 15.30 (.602) - b - 1 2 3 20.30 (.800) 19.70 (.775) 14.80 (.583) 14.20 (.559) 2.40 (.094) 2.00 (.079) 2x 2x 5.45 (.215) 1 dimensioning & tolerancing per ansi y14.5m, 1982. 2 controlling dimension : inch. 3 conforms to jedec outline to-247-ac. 1 - gate 2 - drain 3 - source 4 - drain international rectifier log o assembly lot code example : this is an irfpe30 w ith a ssembly lot code 3a1q part number date code (yyw w ) yy = year ww week 3a1q 9302 irfpe30 a world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 322 3331 european headquarters: hurst green, oxted, surrey rh8 9bb, uk tel: ++ 44 1883 732020 ir canada: 7321 victoria park ave., suite 201, markham, ontario l3r 2z8, tel: (905) 475 1897 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 11 451 0111 ir far east: k&h bldg., 2f, 3-30-4 nishi-ikeburo 3-chome, toshima-ki, tokyo japan 171 tel: 81 3 3983 0086 ir southeast asia: 315 outram road, #10-02 tan boon liat building, singapore 0316 tel: 65 221 8371 http://www.irf.com/ data and specifications subject to change without notice. 3/98
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